AMD published Security Bulletin AMD-SB-7052 for CVE-2026-46174, a microarchitectural vulnerability in the Zen 2 processor generationโs operation cache (op-cache). The op-cache is a micro-op cache that stores decoded instructions before the execution pipeline โ a performance optimisation present in Zen 2 and refined in subsequent Zen generations.
The vulnerability enables a local attacker to exploit the op-cacheโs behaviour under specific timing conditions to execute code with kernel-level privileges from a non-privileged userspace context. CVSS 8.8 (CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H).
Affected Processors
AMD-SB-7052 identifies all Zen 2-based processors as potentially affected:
- AMD Ryzen 3000 Series desktop processors (Matisse)
- AMD Ryzen 4000 Series desktop (Renoir) and mobile processors
- AMD Ryzen 5000 Series mobile processors (Lucienne/Cezanne โ Zen 2 mobile variants)
- AMD EPYC 7002 Series server processors (Rome) โ enterprise/data centre exposure
- AMD Ryzen Threadripper 3000 Series
Zen 3, Zen 4, and Zen 5 processors use a redesigned op-cache architecture and are not affected by this specific vulnerability.
Technical Background
Modern out-of-order processors decode complex instructions (x86 CISC) into simpler micro-operations (ฮผops) before feeding them to the execution engine. The op-cache stores these decoded ฮผops to avoid re-decoding the same instructions repeatedly โ a significant performance win for loops and frequently-called functions.
CVE-2026-46174 exploits a flaw in how the Zen 2 op-cache handles privilege level transitions. In a correctly implemented processor, the privilege ring of the code that cached a ฮผop sequence should not affect execution when that cached sequence is fetched in a different ring context. The Zen 2 op-cache does not isolate privilege-specific properties of cached operations correctly under certain microarchitectural conditions, allowing a userspace attacker to construct a timing-dependent sequence that retrieves a cached kernel-mode ฮผop sequence and executes it with kernel privileges.
This attack class is related to but distinct from Spectre (speculative execution) and Meltdown (memory isolation). Those attacks leak data by exploiting speculative execution paths; CVE-2026-46174 exploits an execution path in the op-cache that produces incorrect privilege assignment for cached code.
Remediation: PI Firmware Updates
Unlike software vulnerabilities, CVE-2026-46174 is addressed through a CPU microcode update delivered via platform firmware (PI firmware, also called BIOS/UEFI). Operating system kernel patches alone are not sufficient โ the microcode update is required to change the op-cache behaviour at the hardware level.
Update paths:
- Consumer systems: BIOS/UEFI update from the motherboard manufacturer (ASUS, Gigabyte, MSI, ASRock, etc.) that includes the updated AMD AGESA firmware incorporating the CVE-2026-46174 microcode
- Server systems (EPYC 7002/Rome): BMC/BIOS firmware update from the server OEM (Dell, HPE, Lenovo, Supermicro) โ consult vendor security advisories for EPYC platform firmware releases
- OEM laptops/workstations: BIOS update from the laptop manufacturer (Lenovo, HP, Dell, ASUS)
Virtualisation Platform Impact
The Xen Project issued XSA-490 acknowledging that CVE-2026-46174 affects Xen hypervisors running on Zen 2 hardware. The vulnerability allows a guest virtual machine to potentially execute code in the hypervisor privilege context.
For Xen-based cloud and virtualisation infrastructure on Zen 2 (EPYC Rome), the XSA-490 advisory should be treated as critical infrastructure risk. The PI firmware update for the host is the required remediation; Xen-level mitigations alone are insufficient.
AWS, Azure, and Google Cloud have issued statements regarding their EPYC Rome fleet. Check your cloud providerโs security bulletin for exposure on dedicated host configurations; shared-tenancy instances are typically patched at the hypervisor level by the provider.
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